33 #ifdef __PROPELLER_COG__
95 #define UART_ERRORS_LIMIT 16
97 #define UART_ERRORS_BASE 64
115 static const uint8_t DEFAULT_DATA_WIDTH = 8;
117 static const uint8_t DEFAULT_STOP_BIT_WIDTH = 1;
119 static const int MAX_BAUD = 4413793;
122 virtual ErrorCode set_data_width (
const uint8_t dataWidth) {
123 if (1 > dataWidth || dataWidth > 16)
126 this->m_dataWidth = dataWidth;
128 this->m_dataMask = 0;
129 for (uint8_t i = 0; i < this->m_dataWidth; ++i)
130 this->m_dataMask |= 1 << i;
132 this->set_parity_mask();
133 this->set_total_bits();
138 uint8_t get_data_width ()
const {
139 return this->m_dataWidth;
143 this->m_parity = parity;
144 this->set_parity_mask();
145 this->set_stop_bit_mask();
146 this->set_total_bits();
150 return this->m_parity;
153 ErrorCode set_stop_bit_width (
const uint8_t stopBitWidth) {
155 if (0 == stopBitWidth || stopBitWidth > 14)
158 this->m_stopBitWidth = stopBitWidth;
160 this->set_stop_bit_mask();
162 this->set_total_bits();
167 uint8_t get_stop_bit_width ()
const {
168 return this->m_stopBitWidth;
171 void set_baud_rate (
const int32_t baudRate) {
172 this->m_bitCycles =
CLKFREQ / baudRate;
175 int32_t get_baud_rate ()
const {
176 return CLKFREQ / this->m_bitCycles;
185 this->set_data_width(UART::DEFAULT_DATA_WIDTH);
186 this->set_parity(UART::DEFAULT_PARITY);
187 this->set_stop_bit_width(UART::DEFAULT_STOP_BIT_WIDTH);
188 this->set_baud_rate(_cfg_baudrate);
195 void set_stop_bit_mask () {
197 this->m_stopBitMask = 1;
198 for (uint8_t i = 0; i < this->m_stopBitWidth - 1; ++i)
199 this->m_stopBitMask |= this->m_stopBitMask << 1;
203 this->m_stopBitMask <<= this->m_dataWidth;
205 this->m_stopBitMask <<= 1;
212 void set_parity_mask () {
213 this->m_parityMask = (uint16_t) (1 << this->m_dataWidth);
222 void set_total_bits () {
224 this->m_totalBits = (uint8_t) (1 + this->m_dataWidth
225 + this->m_stopBitWidth);
234 uint16_t m_parityMask;
235 uint8_t m_stopBitWidth;
236 uint32_t m_stopBitMask;
237 uint32_t m_bitCycles;
241 #ifdef __PROPELLER_COG__